Examples

   1.DIVL R0,R1

     .SET_REGISTERS ALIGNED=R1
     MOVL     8(R1), R2          ; Compiler will use aligned load.

     In this example, the compiler would normally consider R1
     unaligned after the division. Any memory references using R1 as
     a base register (until it is changed again) would use unaligned
     load/stores. If it is known that the actual value will always
     be aligned, performance could be improved by adding a .SET_
     REGISTERS directive, as shown.

   2.MOV1     4(R0), R1          ;Stored memory addresses assumed

     .SET_REGISTERS UNALIGNED=R1 ;aligned so explicitly set it un-
     MOVL     4(R1), R2          ;aligned to avoid run-time fault.

     In this example, R1 would be considered longword aligned after
     the MOVL. If it is actually unaligned, an alignment fault would
     occur on memory reference that follows at run time. To prevent
     this, the .SET_REGISTERS directive can be used, as shown.

   3..SET_REGISTERS READ=<R3,R4>, WRITTEN=R5

     JSB     DO_SOMETHING_USEFUL

     In this example, the read/written attributes are used to
     explicitly declare register uses which the compiler cannot
     detect. R3 and R4 are input registers to the JSB target
     routine, and R5 is an output register. This is particularly
     useful if the routine containing this JSB does not use these
     registers itself, or if the SET_REGISTERS directive and JSB
     are embedded in a macro. When compiled with /FLAG=HINTS,
     routines which use the macro would then have R3 and R4 listed
     as possible input registers, even if they are not used in that
     routine.