Copyright Digital Equipment Corp. All rights reserved.
Intrinsic_Procedures
Additional information available:
ABS ACHAR ACOS ACOSD ADJUSTL
ADJUSTR AIMAG AINT ALL ALLOCATED
AMAX0 AMIN0 ANINT ANY ASIN
ASIND ASM (Alpha only) ASSOCIATED ATAN
ATAND ATAN2 ATAN2D BIT_SIZE BTEST
CEILING CHAR CMPLX CONJG COS
COSD COSH COTAN COTAND COUNT
CPU_TIME CSHIFT DATE DATE_AND_TIME DBLE
DCMPLX DFLOAT DIGITS DIM DIMAG
DOT_PRODUCT DPROD DREAL EOF EOSHIFT
EPSILON ERRSNS EXIT EXP EXPONENT
FLOAT FLOOR FP_CLASS FRACTION FREE
HUGE IABS IACHAR IAND IARGCOUNT
IARGPTR IBCHNG IBCLR IBITS IBSET
ICHAR IDATE IDIM IDINT IDNINT
IEOR IFIX ILEN IMAG INDEX
INT INT_PTR_KIND IOR IQINT IQNINT
ISHA ISHC ISHFT ISHFTC ISHL
ISIGN ISNAN KIND LBOUND LEADZ
LEN LEN_TRIM LGE LGT LLE
LLT LOC LOG LOG10 LOGICAL
MALLOC MATMUL MAX MAX0 MAX1
MAXEXPONENT MAXLOC MAXVAL MERGE MIN
MIN0 MIN1 MINEXPONENT MINLOC MINVAL
MOD MODULO MULT_HIGH MY_PROCESSOR MVBITS
NEAREST NINT NOT NULL
NUMBER_OF_PROCESSORS NWORKERS PACK POPCNT
POPPAR PRECISION PRESENT PROCESSORS_SHAPE
PRODUCT QCMPLX QEXT QFLOAT QREAL
RADIX RAN RANDOM_NUMBER RANDOM_SEED RANDU
RANGE REAL REPEAT RESHAPE RRSPACING
SCALE SCAN SECNDS SELECTED_INT_KIND
SELECTED_REAL_KIND SET_EXPONENT SHAPE SIGN
SIN SIND SINH SIZE SIZEOF
SPACING SPREAD SNGL SQRT SUM
SYSTEM_CLOCK TAN TAND TANH TIME
TINY TRAILZ TRANSFER TRANSPOSE TRIM
UBOUND UNPACK VERIFY ZEXT