--******************************************************************************************************************** -- Created: 9-Mar-2021 22:28:27 by OpenVMS SDL EV3-3 -- Source: 18-MAR-2008 16:15:05 $1$DGA8085:[LIB_ADA.LIS]IOCDEF.SDL;1 --******************************************************************************************************************** with SYSTEM; use SYSTEM; with STARLET; use STARLET; with CONDITION_HANDLING; use CONDITION_HANDLING; package IOCDEF is -- module $IOCDEF --+ -- -- $IOCDEF - flag bits used in I/O database search routines. -- --- IOC_M_PHY : constant := 16#00000001#; IOC_M_TYPE : constant := 16#00000002#; IOC_M_CLASS : constant := 16#00000004#; IOC_M_LOCAL : constant := 16#00000008#; IOC_M_EXISTS : constant := 16#00000010#; IOC_M_2P : constant := 16#00000020#; IOC_M_ANY : constant := 16#00000040#; IOC_M_MOUNT : constant := 16#00000080#; IOC_M_ALT : constant := 16#00000100#; IOC_M_NO_TRANS : constant := 16#00000200#; IOC_M_ALLOC : constant := 16#00000400#; IOC_M_DTN : constant := 16#00000800#; IOC_M_NOLOCK : constant := 16#00001000#; IOC_M_PAC : constant := 16#00002000#; IOC_M_B4CREATE : constant := 16#00004000#; IOC_S_IOCDEF : constant := 2; -- Old size name, synonym for IOC$S_IOC type IOC_TYPE is record -- IOC$V_PHY must be bit 0!! PHY : BOOLEAN; -- physical device specified TYP : BOOLEAN; -- device type name specified CLASS : BOOLEAN; -- allocation class present LOCAL : BOOLEAN; -- search local devices only EXISTS : BOOLEAN; -- device exists IOC_2P : BOOLEAN; -- device is on UCB secondary path ANY : BOOLEAN; -- find any matching device MOUNT : BOOLEAN; -- find only mountable devices ALT : BOOLEAN; -- alternate UCB found NO_TRANS : BOOLEAN; -- caller translated logical name ALLOC : BOOLEAN; -- allocate mountable device DTN : BOOLEAN; -- search for DDRed device NOLOCK : BOOLEAN; -- don't take out device lock PAC : BOOLEAN; -- This is a port allocation class B4CREATE : BOOLEAN; -- don't skip UCB$V_NO_ASSIGN or UCB$V_CDP devices FILLER_1 : BOOLEAN; end record; for IOC_TYPE use record PHY at 0 range 0 .. 0; TYP at 0 range 1 .. 1; CLASS at 0 range 2 .. 2; LOCAL at 0 range 3 .. 3; EXISTS at 0 range 4 .. 4; IOC_2P at 0 range 5 .. 5; ANY at 0 range 6 .. 6; MOUNT at 0 range 7 .. 7; ALT at 1 range 0 .. 0; NO_TRANS at 1 range 1 .. 1; ALLOC at 1 range 2 .. 2; DTN at 1 range 3 .. 3; NOLOCK at 1 range 4 .. 4; PAC at 1 range 5 .. 5; B4CREATE at 1 range 6 .. 6; FILLER_1 at 1 range 7 .. 7; end record; for IOC_TYPE'SIZE use 16; IOC_TYPE_INIT : constant IOC_TYPE := (PHY => FALSE, TYP => FALSE, CLASS => FALSE, LOCAL => FALSE, EXISTS => FALSE, IOC_2P => FALSE, ANY => FALSE, MOUNT => FALSE, ALT => FALSE, NO_TRANS => FALSE, ALLOC => FALSE, DTN => FALSE, NOLOCK => FALSE, PAC => FALSE, B4CREATE => FALSE, FILLER_1 => FALSE); -- -- --************************************************************************* -- Format of AGP Command Register as defined by AGP Spec V2.0 --************************************************************************* -- IOC_M_AGP_CMD_1X : constant := 16#00000001#; IOC_M_AGP_CMD_2X : constant := 16#00000002#; IOC_M_AGP_CMD_4X : constant := 16#00000004#; IOC_M_AGP_CMD_FW : constant := 16#00000010#; IOC_M_AGP_CMD_4G : constant := 16#00000020#; IOC_M_AGP_ENABLE : constant := 16#00000100#; IOC_M_AGP_CMD_SBA : constant := 16#00000200#; IOC_M_AGP_RQ_DEPTH : constant := 16#FF000000#; type IOC_CMD_TYPE is record AGP_CMD_1X : BOOLEAN; -- AGP RATE = 1 AGP_CMD_2X : BOOLEAN; -- AGP RATE = 2 AGP_CMD_4X : BOOLEAN; -- AGP RATE = 4 FILLER_1 : BOOLEAN; -- RESERVED AGP_CMD_FW : BOOLEAN; -- AGP FASTWRITE AGP_CMD_4G : BOOLEAN; -- AGP ADDRESS > 4GIGABYTE FILLER_2 : UNSIGNED_2; -- RESERVED AGP_ENABLE : BOOLEAN; -- AGP ENABLE AGP_CMD_SBA : BOOLEAN; -- SIDEBAND ADDRESS MECHANISM FILLER_3 : UNSIGNED_14; -- RESERVED AGP_RQ_DEPTH : UNSIGNED_8; -- AGP REQUEST QUEUE DEPTH end record; for IOC_CMD_TYPE use record AGP_CMD_1X at 0 range 0 .. 0; AGP_CMD_2X at 0 range 1 .. 1; AGP_CMD_4X at 0 range 2 .. 2; FILLER_1 at 0 range 3 .. 3; AGP_CMD_FW at 0 range 4 .. 4; AGP_CMD_4G at 0 range 5 .. 5; FILLER_2 at 0 range 6 .. 7; AGP_ENABLE at 1 range 0 .. 0; AGP_CMD_SBA at 1 range 1 .. 1; FILLER_3 at 1 range 2 .. 15; AGP_RQ_DEPTH at 3 range 0 .. 7; end record; for IOC_CMD_TYPE'SIZE use 32; IOC_CMD_TYPE_INIT : constant IOC_CMD_TYPE := (AGP_CMD_1X => FALSE, AGP_CMD_2X => FALSE, AGP_CMD_4X => FALSE, FILLER_1 => FALSE, AGP_CMD_FW => FALSE, AGP_CMD_4G => FALSE, FILLER_2 => 0, AGP_ENABLE => FALSE, AGP_CMD_SBA => FALSE, FILLER_3 => 0, AGP_RQ_DEPTH => 0); -- -- --************************************************************************* -- Format of AGP Status Register as defined by AGP Spec V2.0 --************************************************************************* -- IOC_M_AGP_STS_1X : constant := 16#00000001#; IOC_M_AGP_STS_2X : constant := 16#00000002#; IOC_M_AGP_STS_4X : constant := 16#00000004#; IOC_M_AGP_STS_FW : constant := 16#00000010#; IOC_M_AGP_STS_4G : constant := 16#00000020#; IOC_M_AGP_STS_SBA : constant := 16#00000200#; IOC_M_AGP_RQ : constant := 16#FF000000#; type IOC_STS_TYPE is record AGP_STS_1X : BOOLEAN; -- AGP RATE = 1 AGP_STS_2X : BOOLEAN; -- AGP RATE = 2 AGP_STS_4X : BOOLEAN; -- AGP RATE = 4 FILLER_1 : BOOLEAN; -- RESERVED AGP_STS_FW : BOOLEAN; -- AGP FASTWRITE AGP_STS_4G : BOOLEAN; -- AGP ADDRESS > 4GIGABYTE FILLER_2 : UNSIGNED_3; -- RESERVED AGP_STS_SBA : BOOLEAN; -- SIDEBAND ADDRESS MECHANISM FILLER_3 : UNSIGNED_14; -- RESERVED AGP_RQ : UNSIGNED_8; -- AGP REQUEST QUEUE DEPTH end record; for IOC_STS_TYPE use record AGP_STS_1X at 0 range 0 .. 0; AGP_STS_2X at 0 range 1 .. 1; AGP_STS_4X at 0 range 2 .. 2; FILLER_1 at 0 range 3 .. 3; AGP_STS_FW at 0 range 4 .. 4; AGP_STS_4G at 0 range 5 .. 5; FILLER_2 at 0 range 6 .. 8; AGP_STS_SBA at 1 range 1 .. 1; FILLER_3 at 1 range 2 .. 15; AGP_RQ at 3 range 0 .. 7; end record; for IOC_STS_TYPE'SIZE use 32; IOC_STS_TYPE_INIT : constant IOC_STS_TYPE := (AGP_STS_1X => FALSE, AGP_STS_2X => FALSE, AGP_STS_4X => FALSE, FILLER_1 => FALSE, AGP_STS_FW => FALSE, AGP_STS_4G => FALSE, FILLER_2 => 0, AGP_STS_SBA => FALSE, FILLER_3 => 0, AGP_RQ => 0); -- -- --************************************************************************* -- Function codes used by system routines ioc$read_io, ioc$write_io --************************************************************************* -- IOC_K_BYTE_LANED : constant := 1; IOC_K_WORD_LANED : constant := 2; IOC_K_LONGWORD : constant := 4; IOC_K_QUADWORD : constant := 8; IOC_K_BYTE : constant := 256; IOC_K_WORD : constant := 512; -- -- --************************************************************************* -- Function codes used by system routine ioc$node_function --************************************************************************* -- IOC_K_ENABLE_INTR : constant := 1; IOC_K_DISABLE_INTR : constant := 2; IOC_K_ENABLE_SG : constant := 3; IOC_K_DISABLE_SG : constant := 4; IOC_K_ENABLE_PAR : constant := 5; IOC_K_DISABLE_PAR : constant := 6; IOC_K_ENABLE_BLKM : constant := 7; IOC_K_DISABLE_BLKM : constant := 8; IOC_K_ISSUE_EOI : constant := 9; IOC_K_ENABLE_DISTRIB_INTR : constant := 10; IOC_K_DISABLE_DISTRIB_INTR : constant := 11; IOC_K_AGP_READ_COMMAND : constant := 12; IOC_K_AGP_WRITE_COMMAND : constant := 13; -- --------------------------------------------------------------------------- -- Multiple Vector Interrupt ioc$node_function codes -- IOC_K_MVI_MASK_EVENT : constant := 14; IOC_K_MVI_UNMASK_EVENT : constant := 15; IOC_K_MVI_REQUEST_VECTORS : constant := 16; IOC_K_MVI_MAP_VECTOR : constant := 17; IOC_K_MVI_DISPATCH_EVENT : constant := 18; IOC_K_MVI_DISPATCH_VECTOR : constant := 19; IOC_K_MVI_DISPATCH_UNIQUE : constant := 20; -- -- --************************************************************************* -- Function codes used by system routine ioc$node_data --************************************************************************* -- IOC_K_TURBO_SLOT_DENSE_PA : constant := 1; IOC_K_TURBO_SLOT_SPARSE_PA : constant := 2; IOC_K_FBUS_INT_LOC : constant := 3; IOC_K_EISA_IRQ : constant := 4; IOC_K_EISA_DMA_CHAN : constant := 5; IOC_K_EISA_CONFIG_BLOCK : constant := 6; IOC_K_EISA_MEM_CONFIG : constant := 7; IOC_K_LBUS_DEV_BLK_PTR : constant := 8; IOC_K_EISA_IO_PORT : constant := 9; IOC_K_SCSI_CLK_PERIOD : constant := 10; IOC_K_CPU_INT_MASK : constant := 11; IOC_K_IO_PORT_RAD : constant := 12; -- -- --------------------------------------------------------------------------- -- The following codes are actually used by the I/O space -- mapping routine IOC$MAP_IO. But, add them anyway to the -- IOC$NODE_DATA list as unique codes. -- -- Add synonyms for the IOC$MAP_IO function codes until the -- old ones are legislated out of existence. -- IOC_K_IO_CSR_BYTE_ACCESS : constant := 11; IOC_K_BUS_IO_BYTE_GRAN : constant := 11; IOC_K_IO_CSR_LONG_ACCESS : constant := 12; IOC_K_IO_MEM_BYTE_ACCESS : constant := 13; IOC_K_BUS_MEM_BYTE_GRAN : constant := 13; IOC_K_IO_MEM_LONG_ACCESS : constant := 14; IOC_K_BUS_MEM_DENSE : constant := 14; -- -- --------------------------------------------------------------------------- -- The following code is used by drivers to request the address -- swizzle factor of an I/O bus. -- IOC_K_IO_ADDRESS_SWIZZLE : constant := 15; -- -- --------------------------------------------------------------------------- -- The following two are synonyms to request the bus address -- of the direct DMA window. -- IOC_K_DIRECT_DMA_BASE : constant := 16; IOC_K_DDMA_BASE_BA : constant := 16; -- -- --------------------------------------------------------------------------- -- Old code uses this function code to get the size of the -- direct dma window. If the system is a Galaxy system, -- and the minpfn is nonzero, this function code will -- return a size of zero, even if it isn't. See DDMA_WIN_SIZE -- below. -- IOC_K_DIRECT_DMA_SIZE : constant := 17; -- -- --------------------------------------------------------------------------- -- add an ioc$node_data code for the ISA bus user parameter. -- also an ioc$node_data code for the dipl problem. -- these are added here so that it is easy to see what the next -- number to use will be. (could be added to node_data list above) -- IOC_K_ISA_USER_PARAM : constant := 18; IOC_K_DEVICE_IPL : constant := 19; -- --------------------------------------------------------------------------- -- Add an ioc$node_data code for monster windows -- IOC_K_MONSTER_WINDOW : constant := 20; -- -- --------------------------------------------------------------------------- -- This function code will always return the true size of -- the direct dma window. DDMA_BASE_PA will return the -- memory address of the direct dma window, no longer to -- be presumed zero. IOC_K_DDMA_WIN_SIZE : constant := 21; IOC_K_DDMA_BASE_PA : constant := 22; -- -- --------------------------------------------------------------------------- -- Add an ioc$node_data code for AGP capabilities mask -- The data returned is formatted to conform to the AGP STATUS longword -- found in the configuration header for the AGP bus. IOC_K_AGP_CAP_MASK : constant := 23; -- -- -- --------------------------------------------------------------------------- -- This ioc$node_data function code will identify the system building block -- in which an adapter resides. Support for this code is currently -- planned only for Wildfire and Marvel class alpha systems. All others -- will return SS$_ILLIOFUNC. -- IOC_K_IO_PORT_LOC : constant := 24; -- -- --------------------------------------------------------------------------- -- This ioc$node_data function returns the translation offset quadword -- from the ADP for the specified CRB. If the ADP doesn't contain a -- valid translation offset, this function returns SS$_ILLIOFUNC. -- IOC_K_IO_TRA_OFFSET : constant := 25; -- -- --------------------------------------------------------------------------- -- Return a pointer to the BUSARRAYENTRY -- IOC_K_BUSARRAYENTRY : constant := 26; -- -- --------------------------------------------------------------------------- -- MSI and Multiple Vector Interrupt ioc$node_data codes -- IOC_K_INT_MECH : constant := 27; IOC_K_MSIABS : constant := 28; IOC_K_MVI_DEV_VECTORS_REQ : constant := 29; IOC_K_MVI_SYS_VECTORS_GRA : constant := 30; IOC_K_MVI_DATA : constant := 31; IOC_K_MVI_PENDING_EVENT : constant := 32; -- -- --------------------------------------------------------------------------- -- Return a mask of platform DMA capabilities as defined in ADPDEF -- IOC_K_DMA_CAP_MASK : constant := 33; -- -- --------------------------------------------------------------------------- -- Additional MSI and Multiple Vector Interrupt ioc$node_data codes -- IOC_K_MVI_USR_VECTORS_REQ : constant := 34; -- -- --------------------------------------------------------------------------- -- A function code for IOC$NODE_DATA that drivers can call to see if -- their platform has a SG Map. (The only platforms that should fail with -- SS$_ITEMNOTFOUND are Sentosa, Kauai and Bucchaneer and later platforms). -- IOC_K_SG_MAP_PRESENT : constant := 35; -- -- --************************************************************************* -- Values returned by IOC$K_INT_MECH node_data call. -- These values are mutually exclusive. --************************************************************************* -- IOC_K_INT_MECH_IOSAPIC : constant := 1; -- IOSAPIC delivery mechanism IOC_K_INT_MECH_MSI : constant := 2; -- Standard MSI mechanism IOC_K_INT_MECH_MSIX : constant := 3; -- MSI-X mechanism -- -- --************************************************************************* -- MVI_DATA and MVI_QENTRY --************************************************************************* -- -- These structures contain Data returned by calling ioc$node_function -- with the function code IOC$K_MSI_REQUEST_VECTORS. -- -- The Hash Table created maps Interrupt Vectors and Vector Table -- Entries to ISR subroutines. -- -- The sequence of events that builds this tree is as follows. -- -- AT UNIT INIT TIME: -- -- . A driver calls ioc$node_function for IOC$K_MVI_REQUEST_VECTORS -- -- . This call returns an MVI_DATA structure containing the number -- of interrupt vectors requested by the device, the number of -- vectors granted by the system, and a pointer to an array of -- queue headers, one for each of the vectors granted, containing -- the vector. -- -- . The driver implements its policy for distributing the vectors -- granted to it by walking the mvi_array and for each vector -- in the array, the driver calls ioc$node_function again for -- IOC$K_MVI_MAP_FUNCTION with the Interrupt Vector, the Pointer -- to the Subroutine for handling the Interrupt, and, in the case -- of MSI-X, the Vector Table Entry Index. -- -- . In the case where the driver was granted fewer vectors than -- requested, and the driver must share the vectors with more -- than one ISR subroutine or Vector Table Entry, a queue will -- be formed for each shared Interrupt Vector. -- -- AT RUN TIME -- -- . When an interrupt occurs, the driver will call ioc$node_function -- for IOC$K_MVI_DISPATCH_VECTOR, which will run down each ISR -- subroutine in the queue for the given vector. The driver should -- fork and lower IPL before calling this function. -- -- . Before exiting, the driver should call ioc$node_function for -- IOC$K_MVI_PENDING to see if there are any other interrupts -- pending. This call will return the Vector Table Index of any -- pending interrupts. -- -- . For each pending interrupt the driver should call -- ioc$node_function for IOC$K_MVI_DISPATCH_VTE in a loop -- until all pending interrupts have been handled. -- -- . Optionally, a driver can call ioc$node_function with a code -- of IOC$K_MASK_VTE to mask interrupts from a Vector Table Entry -- or IOC$_UNMASK_VTE to unmask interrupts from a Vector Table -- Entry. -- -- . In the case where a driver wants to assign a different vector -- to a given Vector Table Entry, it will call ioc$node_function -- for IOC$K_MVI_CHANGE_VECTOR with the new vector, the Vector -- Table Index, and the Pointer to the ISR subroutine. -- -- -- MVI_DATA -- +-------------+ -- | Requested | -- +-------------+ -- | Granted | -- +-------------+ -- .------| Hash_Table | -- | +-------------+ -- | -- | .-----------------------------------------------------------------. -- | | | -- | | .-------------------------------------------------------------. | -- | | | | | -- | | | MULTIPLE VECTOR INTERRUPT HASH TABLE | | -- | | | | | -- | | | MVI_QENTRY MVI_QENTRY MVI_QENTRY | | -- | | | +-------------+ +-------------+ +-------------+ | | -- | | `->| Flink |----->| Flink |----->| Flink |>-' | -- `----->| |<--. | |<--. | |<---' -- | +-------------+ | +-------------+ | +-------------+ -- `---<| Blink | `--| Blink | `--| Blink | -- +-------------+ +-------------+ +-------------+ -- | Vector | | Vector | | Vector | -- +-------------+ +-------------+ +-------------+ -- | CPU ID | | CPU ID | | CPU ID | -- +-------------+ +-------------+ +-------------+ -- | Func Ptr | | Func Ptr | | Func Ptr | -- +-------------+ +-------------+ +-------------+ -- | Vec Tab Idx | | Vec Tab Idx | | Vec Tab Idx | -- +-------------+ +-------------+ +-------------+ -- | -- v -- +-------------+ +-------------+ +-------------+ -- | Flink |----->| Flink |----->| Flink | -- | |<--. | |<--. | | -- +-------------+ | +-------------+ | +-------------+ -- | Blink | `--| Blink | `--| Blink | -- +-------------+ +-------------+ +-------------+ -- | Vector | | Vector | | Vector | -- +-------------+ +-------------+ +-------------+ -- | CPU ID | | CPU ID | | CPU ID | -- +-------------+ +-------------+ +-------------+ -- | Func Ptr | | Func Ptr | | Func Ptr | -- +-------------+ +-------------+ +-------------+ -- | Vec Tab Idx | | Vec Tab Idx | | Vec Tab Idx | -- +-------------+ +-------------+ +-------------+ -- | -- v -- --************************************************************************* -- MVI_QENTRY Multiple Vector Interrupt Queue Entry --************************************************************************* -- -- MVI_QENTRY Maps an Interrupt Vector to an ISR subroutine, and, for -- MSIX, an MSIX Vector Table Entry. -- -- There will be one instance of these for every vector, and in the case -- of MSIX, every Vector Table Entry. Additionally, for MSI, there is an -- array of pointers to every MVI_QENTRY structure, one for each Vector -- Table Entry. -- -- Because it is possible that the OS will not return all the vectors -- that a device requests, vectors will have to be shared among the -- various ISR subroutines and, in the case of MSIX, associated Vector -- Table Entries. -- -- Vectors that hash to the same MVI_QENTRY index will be chained in a -- queue. For the sake of performance, we hope our hash algorithm is -- good enough to hash only one vector to each queue. -- -- When the ISR dispatch function runs down a given vector, it will be -- hashed to a chain in the MVI_QENTRY has table and the dispatch function -- will execute all the ISR subroutines in that chain. -- type MVI_QENTRY_TYPE is record FLINK : ADDRESS; BLINK : ADDRESS; FUNCTIO : ADDRESS; -- ISR Subroutine VECTOR : INTEGER_32; CPUID : INTEGER_32; VTE_INDEX : INTEGER_32; -- Useful to MVI-X only -- -- Insure quadword alignment. -- FILLER_1 : UNSIGNED_BYTE_ARRAY (1 .. 0); end record; for MVI_QENTRY_TYPE use record FLINK at 0 range 0 .. 31; BLINK at 4 range 0 .. 31; FUNCTIO at 8 range 0 .. 31; VECTOR at 12 range 0 .. 31; CPUID at 16 range 0 .. 31; VTE_INDEX at 20 range 0 .. 31; FILLER_1 at 24 range 0 .. -1; end record; for MVI_QENTRY_TYPE'SIZE use 192; MVI_QENTRY_TYPE_INIT : constant MVI_QENTRY_TYPE := (FLINK => ADDRESS_ZERO, BLINK => ADDRESS_ZERO, FUNCTIO => ADDRESS_ZERO, VECTOR => 0, CPUID => 0, VTE_INDEX => 0, FILLER_1 => (others => 0)); type MVI_DATA_TYPE is record REQUESTED : INTEGER_32; -- Number of vectors requested GRANTED : INTEGER_32; -- Number of vectors granted VEC_ARRAY : ADDRESS; -- List of granted vectors VTE_ARRAY : ADDRESS; -- Vector Table Entry Array HASH_TABLE : ADDRESS; -- Pointer to the Hash Table BITMAP : ADDRESS; -- Bitmap for hash table BITMAP_SIZE : INTEGER_32; -- Size of Bitmap in bits -- -- Insure quadword alignment. -- FILLER_1 : UNSIGNED_BYTE_ARRAY (1 .. 4); end record; for MVI_DATA_TYPE use record REQUESTED at 0 range 0 .. 31; GRANTED at 4 range 0 .. 31; VEC_ARRAY at 8 range 0 .. 31; VTE_ARRAY at 12 range 0 .. 31; HASH_TABLE at 16 range 0 .. 31; BITMAP at 20 range 0 .. 31; BITMAP_SIZE at 24 range 0 .. 31; FILLER_1 at 28 range 0 .. 31; end record; for MVI_DATA_TYPE'SIZE use 256; MVI_DATA_TYPE_INIT : constant MVI_DATA_TYPE := (REQUESTED => 0, GRANTED => 0, VEC_ARRAY => ADDRESS_ZERO, VTE_ARRAY => ADDRESS_ZERO, HASH_TABLE => ADDRESS_ZERO, BITMAP => ADDRESS_ZERO, BITMAP_SIZE => 0, FILLER_1 => (others => 0)); end IOCDEF;