!*** MODULE $PRDEF ***
!DEC$ OPTIONS/ALIGN=(RECORDS=PACKED,COMMONS=PACKED)/NOWARN
 ! +
 !   PROCESSOR REGISTER DEFINITIONS
 ! 
 ! 	The following IPR symbols are provided for the convenience
 ! 	of common Macro-32 code using the VAX MFPR/MTPR instructions
 ! 	to operate against IPRs that exist in both architectures
 ! 	architectures. Even Alpha-specific Macro-32 code would benefit
 ! 	since the compiler can calculate register live-ness around the
 ! 	VAX MFPR/MTPR instructions.
 ! 
 ! 	The assigned values for the PR$_ipr symbols match the VAX
 ! 	IPR numbers themselves wherever possible. VAX IPR numbers that
 ! 	are extremely unlikely ever to be encountered are otherwise used.
 ! 	The compiler uses the VAX values to validate the invocation of
 ! 	MTPR/MFPR instructions.
 ! -
	PARAMETER PR$_ESP = '00000001'X		 !  Executive Stack Pointer
	PARAMETER PR$_SSP = '00000002'X		 !  Supervisor Stack Pointer
	PARAMETER PR$_USP = '00000003'X		 !  User Stack Pointer
	PARAMETER PR$_ASN = '00000006'X		 !  Address Space Number
	PARAMETER PR$_ASTEN = '00000030'X	 !  AST Enabled Register (MFPR only)
	PARAMETER PR$_ASTSR = '00000031'X	 !  AST Summary Register (MFPR only)
	PARAMETER PR$_DATFX = '00000017'X	 !  Data Alignment Trap Fixup in PALcode Enable
	PARAMETER PR$_IPIR = '00000016'X	 !  Interprocess Interrupt Request
	PARAMETER PR$_IPL = '00000012'X		 !  Interrupt Priority Level
	PARAMETER PR$_MCES = '00000026'X	 !  Machine Check Error Summary
	PARAMETER PR$_PCBB = '00000010'X	 !  Privileged Context Block Base
	PARAMETER PR$_PME = '0000003D'X		 !  Performance Monitor Enable
	PARAMETER PR$_PRBR = '0000000F'X	 !  Processor Base Register
	PARAMETER PR$_SCBB = '00000011'X	 !  System Control Block Base
	PARAMETER PR$_SIRR = '00000014'X	 !  Software Interrupt Request
	PARAMETER PR$_SISR = '00000015'X	 !  Software Interrupt Summary
	PARAMETER PR$_TBIA = '00000039'X	 !  Translation Buffer Invalidate All
	PARAMETER PR$_TBIAP = '00000032'X	 !  Translation Buffer Invalidate All Process
	PARAMETER PR$_TBIS = '0000003A'X	 !  Translation Buffer Invalidate Single - 32 bit VA
	PARAMETER PR$_TBIS_64 = '0000003C'X	 !  Translation Buffer Invalidate Single - 64 bit VA
	PARAMETER PR$_TBISD = '0000003B'X	 !  Translation Buffer Invalidate Single - 64 bit VA - D-stream o
					!  Translation Buffer Invalidate Single - 64 bit VA - D-stream
	PARAMETER PR$_TBISI = '0000002F'X	 !  Translation Buffer Invalidate Single - 64 bit VA - I-stream o
					!  Translation Buffer Invalidate Single - 64 bit VA - I-stream
	PARAMETER PR$_VPTB = '0000000C'X	 !  Virtual Page Table Base Register
 ! +
 !   PROCESSOR REGISTER FIELD DEFINITIONS
 ! -
	PARAMETER PR$_SID_TYP780 = '00000001'X	 !  VAX 11/780 
	PARAMETER PR$_SID_TYP750 = '00000002'X	 !  VAX 11/750 
	PARAMETER PR$_SID_TYP730 = '00000003'X	 !  VAX 11/730 
	PARAMETER PR$_SID_TYP790 = '00000004'X	 !  VAX 11/790
	PARAMETER PR$_SID_TYP8SS = '00000005'X	 !  Scorpio for now
	PARAMETER PR$_SID_TYP8NN = '00000006'X	 !  Nautilus for now
	PARAMETER PR$_SID_TYPUV1 = '00000007'X	 !  MicroVAX I 
	PARAMETER PR$_SID_TYPUV2 = '00000008'X	 !  MicroVAX II 
	PARAMETER PR$_SID_TYP410 = '00000008'X	 !  VAXstar
	PARAMETER PR$_SID_TYP009 = '00000009'X	 !  Virtual VAX
	PARAMETER PR$_SID_TYP420 = '0000000A'X	 !  PVAX
	PARAMETER PR$_SID_TYP520 = '0000000A'X	 !  Cirrus I
	PARAMETER PR$_SID_TYP650 = '0000000A'X	 !  Mayfair
	PARAMETER PR$_SID_TYP9CC = '0000000A'X	 !  Calypso/XCP
	PARAMETER PR$_SID_TYP9CI = '0000000A'X
	PARAMETER PR$_SID_TYP60 = '0000000A'X	 !  Firefox
	PARAMETER PR$_SID_TYP670 = '0000000B'X	 !  KA670 (Pele)
	PARAMETER PR$_SID_TYP9RR = '0000000B'X	 !  XRP
	PARAMETER PR$_SID_TYP43 = '0000000B'X	 !  KA43 (RigelMAX)
	PARAMETER PR$_SID_TYP9AQ = '0000000E'X	 !  Aquarius
	PARAMETER PR$_SID_TYP8PS = '00000011'X	 !  Polarstar
	PARAMETER PR$_SID_TYP1202 = '00000012'X	 !  Mariah/XMP
	PARAMETER PR$_SID_TYP46 = '00000012'X	 !  PV-Mariah
	PARAMETER PR$_SID_TYP600 = '00000013'X
	PARAMETER PR$_SID_TYP690 = '00000013'X
	PARAMETER PR$_SID_TYP700 = '00000013'X
	PARAMETER PR$_SID_TYP1302 = '00000013'X
	PARAMETER PR$_SID_TYP49 = '00000013'X
	PARAMETER PR$_SID_TYP1303 = '00000013'X
	PARAMETER PR$_SID_TYP660 = '00000014'X	 !  KA660 (Spitfire)
	PARAMETER PR$_SID_TYP440 = '00000014'X	 !  PVAX2
	PARAMETER PR$_SID_TYP4A = '00000014'X	 !  PCVAX
	PARAMETER PR$_SID_TYP550 = '00000014'X	 !  Cirrus II
	PARAMETER PR$_SID_TYP1701 = '00000017'X	 !  Laser/Neon
	PARAMETER PR$_SID_TYPMAX = '00000017'X	 !  MAX LEGAL CPU TYPE 
	PARAMETER PR$_SID_TYP_NOTAVAX = '00000080'X  !  Not a VAX (i.e. Alpha or some such)
 ! Chip CPU types
	PARAMETER PR$_SID_TYPUV = '00000008'X	 !  MicroVAX chip
 ! MicroVAX chip CPU Subtypes
	PARAMETER PR$_XSID_UV_UV = '00000000'X	 !  Generic MicroVAX (unused subtype)
	PARAMETER PR$_XSID_UV_UV2 = '00000001'X	 !  MicroVAX II
	PARAMETER PR$_XSID_UV_410 = '00000004'X	 !  VAXstar
	PARAMETER PR$_SID_TYPCV = '0000000A'X	 !  CVAX chip
 ! CVAX chip CPU Subtypes
	PARAMETER PR$_XSID_CV_CV = '00000000'X	 !  Generic CVAX (unused subtype)
	PARAMETER PR$_XSID_CV_650 = '00000001'X	 !  Mayfair
	PARAMETER PR$_XSID_CV_9CC = '00000002'X	 !  Calypso/XCP
	PARAMETER PR$_XSID_CV_60 = '00000003'X	 !  Firefox
	PARAMETER PR$_XSID_CV_420 = '00000004'X	 !  PVAX
	PARAMETER PR$_XSID_CV_9CI = '00000005'X
	PARAMETER PR$_XSID_CV_520 = '00000007'X	 !  CIRRUS I
	PARAMETER PR$_SID_TYPRV = '0000000B'X	 !  Rigel chip
 !  Rigel chip CPU Subtypes
	PARAMETER PR$_XSID_RV_RV = '00000000'X	 !  Generic Rigel (unused subtype)
	PARAMETER PR$_XSID_RV_670 = '00000001'X	 !  KA670 (Pele)
	PARAMETER PR$_XSID_RV_9RR = '00000002'X	 !  Calypso/XRP
	PARAMETER PR$_XSID_RV_43 = '00000004'X	 !  KA43 (RigelMAX)
	PARAMETER PR$_SID_TYPV12 = '00000012'X	 !  Mariah chip set
 !  Mariah chip CPU Subtypes
	PARAMETER PR$_XSID_V12_V12 = '00000000'X  !  Generic Mariah (unused subtype)
	PARAMETER PR$_XSID_V12_1202 = '00000002'X  !  MARIAH/XMP
	PARAMETER PR$_XSID_V12_46 = '00000004'X	 !  PVAX- mariah subtype
	PARAMETER PR$_SID_TYPV13 = '00000013'X
	PARAMETER PR$_XSID_V13_V13 = '00000000'X
	PARAMETER PR$_XSID_V13_690 = '00000001'X
	PARAMETER PR$_XSID_V13_1302 = '00000002'X
	PARAMETER PR$_XSID_V13_1303 = '00000003'X
	PARAMETER PR$_XSID_V13_49 = '00000004'X
	PARAMETER PR$_XSID_V13_700 = '00000005'X
	PARAMETER PR$_XSID_V13_600 = '00000006'X
	PARAMETER PR$_SID_TYPV14 = '00000014'X	 !  SOC Chip SID
 !  SOC chip CPU subtypes
	PARAMETER PR$_XSID_V14_V14 = '00000000'X  !  unused subtype
	PARAMETER PR$_XSID_V14_660 = '00000001'X  !  KA660 (Spitfire)
	PARAMETER PR$_XSID_V14_440 = '00000004'X  !  PVAX2 subtype
	PARAMETER PR$_XSID_V14_4A = '00000005'X	 !  PCVAX subtype
	PARAMETER PR$_XSID_V14_550 = '00000007'X  !  CIRRUS II
	PARAMETER PR$_SID_TYPV17 = '00000017'X	 !  NVAX+ Chip SID
 !  NVAX+ chip CPU subtypes
	PARAMETER PR$_XSID_V17_V17 = '00000000'X  !  unused subtype
	PARAMETER PR$_XSID_V17_1701 = '00000001'X  !  Laser/Neon
 ! Nautilus CPU Subtypes
	PARAMETER PR$_XSID_N8800 = '00000000'X	 !  VAX 8800
	PARAMETER PR$_XSID_N8700 = '00000001'X	 !  VAX 8700
	PARAMETER PR$_XSID_N2 = '00000002'X	 !  Undefined Nautilus CPU
	PARAMETER PR$_XSID_N3 = '00000003'X	 !  Undefined Nautilus CPU
	PARAMETER PR$_XSID_N4 = '00000004'X	 !  Undefined Nautilus CPU
	PARAMETER PR$_XSID_N5 = '00000005'X	 !  Undefined Nautilus CPU
	PARAMETER PR$_XSID_N8550 = '00000006'X	 !  VAX 8550
	PARAMETER PR$_XSID_N8500 = '00000007'X	 !  VAX 8500
	PARAMETER PR$_XSID_N8NNN = -1		 !  Unknown Nautilus CPU
 ! -------------------------------------------------------------------
	PARAMETER PR$M_ASTEN = '0000000F'X
	PARAMETER PR$M_ASTEN_KEN = '00000001'X
	PARAMETER PR$M_ASTEN_EEN = '00000002'X
	PARAMETER PR$M_ASTEN_SEN = '00000004'X
	PARAMETER PR$M_ASTEN_UEN = '00000008'X
	PARAMETER PR$M_ASTEN_DSBL_ALL = '00000000'X  !  Disable all ASTs
	PARAMETER PR$M_ASTEN_ENBL_ALL = '000000FF'X  !  Enable all ASTs
	PARAMETER PR$M_ASTEN_ENBL_K = '00000011'X  !  Enable kernel ASTs
	PARAMETER PR$M_ASTEN_ENBL_E = '00000022'X  !  Enable executive ASTs
	PARAMETER PR$M_ASTEN_ENBL_S = '00000044'X  !  Enable supervisor ASTs
	PARAMETER PR$M_ASTEN_ENBL_U = '00000088'X  !  Enable user ASTs
	PARAMETER PR$M_ASTEN_PRSRV_ALL = '0000000F'X  !  Preserve all enable/disable states
	PARAMETER PR$M_ASTEN_PRSRV_K = '00000001'X  !  Preserve kernel enable/disable
	PARAMETER PR$M_ASTEN_PRSRV_E = '00000002'X  !  Preserve executive enable/disable
	PARAMETER PR$M_ASTEN_PRSRV_S = '00000004'X  !  Preserve supervisor enable/disable
	PARAMETER PR$M_ASTEN_PRSRV_U = '00000008'X  !  Preserve user enable/disable
 ! -------------------------------------------------------------------
	PARAMETER PR$M_ASTSR = '0000000F'X
	PARAMETER PR$M_ASTSR_KPD = '00000001'X
	PARAMETER PR$M_ASTSR_EPD = '00000002'X
	PARAMETER PR$M_ASTSR_SPD = '00000004'X
	PARAMETER PR$M_ASTSR_UPD = '00000008'X
	PARAMETER PR$M_ASTSR_CLR_ALL = '00000000'X  !  Clear pending ASTs
	PARAMETER PR$M_ASTSR_SET_ALL = '000000FF'X  !  Set all ASTs pending
	PARAMETER PR$M_ASTSR_SET_K = '00000011'X  !  Set kernel AST pending
	PARAMETER PR$M_ASTSR_SET_E = '00000022'X  !  Set executive AST pending
	PARAMETER PR$M_ASTSR_SET_S = '00000044'X  !  Set supervisor AST pending
	PARAMETER PR$M_ASTSR_SET_U = '00000088'X  !  Set user AST pending
	PARAMETER PR$M_ASTSR_PRSRV_ALL = '0000000F'X  !  Preserve all pending bits
	PARAMETER PR$M_ASTSR_PRSRV_K = '00000001'X  !  Preserve kernel pending
	PARAMETER PR$M_ASTSR_PRSRV_E = '00000002'X  !  Preserve executive pending
	PARAMETER PR$M_ASTSR_PRSRV_S = '00000004'X  !  Preserve supervisor pending
	PARAMETER PR$M_ASTSR_PRSRV_U = '00000008'X  !  Preserve user pending
 ! -------------------------------------------------------------------
	PARAMETER PR$M_FEN_FEN = '00000001'X
	PARAMETER PR$M_DATFX_DATFX = '00000001'X
	PARAMETER PR$M_IPL_IPL = '0000001F'X
	PARAMETER PR$M_MCES_MCK = '00000001'X
	PARAMETER PR$M_MCES_SCE = '00000002'X
	PARAMETER PR$M_MCES_PCE = '00000004'X
	PARAMETER PR$M_MCES_DPC = '00000008'X
	PARAMETER PR$M_MCES_DSC = '00000010'X
	PARAMETER PR$V_PCBB_PA = '00000000'X	 !  HWPCB Physical Address
	PARAMETER PR$S_PCBB_PA = '00000030'X	 !  HWPCB Physical Address
 ! -------------------------------------------------------------------
	PARAMETER PR$M_PS_SW = '00000003'X
	PARAMETER PR$M_PS_PRVMOD = '00000003'X
	PARAMETER PR$M_PS_SYSSTATE = '00000004'X
	PARAMETER PR$M_PS_CURMOD = '00000018'X
	PARAMETER PR$M_PS_VMM = '00000080'X
	PARAMETER PR$M_PS_IPL = '00001F00'X
	PARAMETER PR$M_PS_SP_ALIGN = '00000000'X
	PARAMETER PR$M_PS_MBZ_62 = '00000000'X
	PARAMETER PR$M_PS_MBZ_63 = '00000000'X
	PARAMETER PR$V_PS_MAX_PS_REG_BIT = '0000000D'X
 ! 
	PARAMETER PR$C_PS_KERNEL = '00000000'X	 !  Kernel Mode
	PARAMETER PR$C_PS_EXEC = '00000001'X	 !  Executive Mode
	PARAMETER PR$C_PS_SUPER = '00000002'X	 !  Supervisor Mode
	PARAMETER PR$C_PS_USER = '00000003'X	 !  User Mode
 ! -------------------------------------------------------------------
	PARAMETER PR$M_PTBR_PFN = 'FFFFFFFF'X
	PARAMETER PR$M_SCBB_PFN = 'FFFFFFFF'X
	PARAMETER PR$M_SIRR_LVL = '0000000F'X
	PARAMETER PR$M_SISR_SUMMARY = '0000FFFF'X
	PARAMETER PR$M_SISR_RAZ = '00000001'X
	PARAMETER PR$M_SISR_IR1 = '00000002'X
	PARAMETER PR$M_SISR_IR2 = '00000004'X
	PARAMETER PR$M_SISR_IR3 = '00000008'X
	PARAMETER PR$M_SISR_IR4 = '00000010'X
	PARAMETER PR$M_SISR_IR5 = '00000020'X
	PARAMETER PR$M_SISR_IR6 = '00000040'X
	PARAMETER PR$M_SISR_IR7 = '00000080'X
	PARAMETER PR$M_SISR_IR8 = '00000100'X
	PARAMETER PR$M_SISR_IR9 = '00000200'X
	PARAMETER PR$M_SISR_IR10 = '00000400'X
	PARAMETER PR$M_SISR_IR11 = '00000800'X
	PARAMETER PR$M_SISR_IR12 = '00001000'X
	PARAMETER PR$M_SISR_IR13 = '00002000'X
	PARAMETER PR$M_SISR_IR14 = '00004000'X
	PARAMETER PR$M_SISR_IR15 = '00008000'X
	PARAMETER PR$M_TBCHK_VA_PRESENT = '00000001'X
	PARAMETER PR$M_IEEE_DNOD = '00000000'X
	PARAMETER PR$M_IEEE_DNZ = '00000000'X
	PARAMETER PR$M_IEEE_INVD = '00000000'X
	PARAMETER PR$M_IEEE_DZED = '00000000'X
	PARAMETER PR$M_IEEE_OVFD = '00000000'X
	PARAMETER PR$M_IEEE_INV = '00000000'X
	PARAMETER PR$M_IEEE_DZE = '00000000'X
	PARAMETER PR$M_IEEE_OVF = '00000000'X
	PARAMETER PR$M_IEEE_UNF = '00000000'X
	PARAMETER PR$M_IEEE_INE = '00000000'X
	PARAMETER PR$M_IEEE_IOV = '00000000'X
	PARAMETER PR$M_IEEE_UNDZ = '00000000'X
	PARAMETER PR$M_IEEE_UNFD = '00000000'X
	PARAMETER PR$M_IEEE_INED = '00000000'X
	PARAMETER PR$M_IEEE_SUMMARY = '00000000'X
	STRUCTURE /PRDEF/
	UNION
	    MAP
	    INTEGER*4 PR$Q_QUAD_ACCESS(2)		 !  Access to register as a quadword
	    END MAP
	    MAP
	    INTEGER*4 PR$L_LONG_ACCESS(1:2)		 !  Access to register as a quadword
	    END MAP
	    MAP
	        PARAMETER PR$S_SID_SN = 12
	        PARAMETER PR$V_SID_SN = 0		 !  SERIAL NUMBER FIELD 
	        PARAMETER PR$S_SID_PL = 3
	        PARAMETER PR$V_SID_PL = 12		 !  PLANT ID 
	        PARAMETER PR$S_SID_ECO = 9
	        PARAMETER PR$V_SID_ECO = 15		 !  ECO LEVEL 
	        PARAMETER PR$S_SID_TYPE = 8
	        PARAMETER PR$V_SID_TYPE = 24
	        BYTE %FILL (4)				 !  CPU TYPE CODE 
	    END MAP
	    MAP
	        PARAMETER PR$S_XSID_TYPE = 8
	        PARAMETER PR$V_XSID_TYPE = 24
	        BYTE %FILL (1)				 !  CPU SUBTYPE CODE 
	    END MAP
 !  SYSTEM ID REGISTER CPU TYPES 
 !  Number assignments are
 !  based upon the jumpers
 !  read by the console from
 !  the MPS backplane
 !  ASTEN - AST Enabled Register
 ! 
 !  NOTE WELL: These bit symbols are to be used only when interfacing to the
 ! 	ASTEN internal processor register. They are NOT to be used when
 ! 	interfacing to the copy of ASTEN which is stored in the Hardware
 ! 	Privileged Context Block (HWPCB). See the HWPCB-specific symbols
 ! 	for how to refer to the ASTEN field in the HWPCB.
 ! 
	    MAP
	    UNION
	        MAP
	        PARAMETER PR$S_ASTEN = 4
	        PARAMETER PR$V_ASTEN = 0
	        BYTE %FILL (1)				 !  Enabled AST mask
	        END MAP
	        MAP
	            PARAMETER PR$S_ASTEN_KEN = 1
	            PARAMETER PR$V_ASTEN_KEN = 0		 !  Kernel AST Enabled
	            PARAMETER PR$S_ASTEN_EEN = 1
	            PARAMETER PR$V_ASTEN_EEN = 1		 !  Executive AST Enabled
	            PARAMETER PR$S_ASTEN_SEN = 1
	            PARAMETER PR$V_ASTEN_SEN = 2		 !  Supervisor AST Enabled
	            PARAMETER PR$S_ASTEN_UEN = 1
	            PARAMETER PR$V_ASTEN_UEN = 3		 !  User AST Enabled
	        BYTE %FILL (1)
	        END MAP
	    END UNION
	    END MAP
 !  ASTSR - AST Summary Register
 ! 
 !  NOTE WELL: These bit symbols are to be used only when interfacing to the
 ! 	ASTSR internal processor register. They are NOT to be used when
 ! 	interfacing to the copy of ASTSR which is stored in the Hardware
 ! 	Privileged Context Block (HWPCB). See the HWPCB-specific symbols
 ! 	for how to refer to the ASTSR field in the HWPCB.
 ! 
	    MAP
	    UNION
	        MAP
	        PARAMETER PR$S_ASTSR = 4
	        PARAMETER PR$V_ASTSR = 0
	        BYTE %FILL (1)				 !  AST pending summary mask
	        END MAP
	        MAP
	            PARAMETER PR$S_ASTSR_KPD = 1
	            PARAMETER PR$V_ASTSR_KPD = 0		 !  Kernel AST Pending
	            PARAMETER PR$S_ASTSR_EPD = 1
	            PARAMETER PR$V_ASTSR_EPD = 1		 !  Executive AST Pending
	            PARAMETER PR$S_ASTSR_SPD = 1
	            PARAMETER PR$V_ASTSR_SPD = 2		 !  Supervisor AST Pending
	            PARAMETER PR$S_ASTSR_UPD = 1
	            PARAMETER PR$V_ASTSR_UPD = 3		 !  User AST Pending
	        BYTE %FILL (1)
	        END MAP
	    END UNION
	    END MAP
 !  FEN - Floating Point Enable
 ! 
 !  NOTE WELL: These bit symbols are to be used only when interfacing to the
 ! 	FEN internal processor register. They are NOT to be used when
 ! 	interfacing to the copy of FEN which is stored in the Hardware
 ! 	Privileged Context Block (HWPCB). See the HWPCB-specific symbols
 ! 	for how to refer to the FEN field in the HWPCB.
 ! 
	    MAP
	    PARAMETER PR$S_FEN_FEN = 1
	    PARAMETER PR$V_FEN_FEN = 0		 !  Floating point enabled = 1
	    BYTE %FILL (1)
	    END MAP
 ! -------------------------------------------------------------------
 !  DATFX - Data Alignment Trap Fixup
 ! 
	    MAP
	    PARAMETER PR$S_DATFX_DATFX = 1
	    PARAMETER PR$V_DATFX_DATFX = 0		 !  Data Alignment Trap Fixup
	    BYTE %FILL (1)
	    END MAP
 ! -------------------------------------------------------------------
 !  IPL - Interrupt Priority Level
 ! 
	    MAP
	    PARAMETER PR$S_IPL_IPL = 5
	    PARAMETER PR$V_IPL_IPL = 0		 !  Interrupt Priority Level
	    BYTE %FILL (1)
	    END MAP
 ! -------------------------------------------------------------------
 !  MCES - Machine Check Error Summary Register
 ! 
	    MAP
	        PARAMETER PR$S_MCES_MCK = 1
	        PARAMETER PR$V_MCES_MCK = 0		 !  Machine Check (W1C)
	        PARAMETER PR$S_MCES_SCE = 1
	        PARAMETER PR$V_MCES_SCE = 1		 !  System Correctable Error (W1C)
	        PARAMETER PR$S_MCES_PCE = 1
	        PARAMETER PR$V_MCES_PCE = 2		 !  Processor Correctable Error (W1C)
	        PARAMETER PR$S_MCES_DPC = 1
	        PARAMETER PR$V_MCES_DPC = 3		 !  Disable Processor Correctable Error report
	        PARAMETER PR$S_MCES_DSC = 1
	        PARAMETER PR$V_MCES_DSC = 4		 !  Disable System Correctable Error report
	    BYTE %FILL (1)
	    END MAP
 ! -------------------------------------------------------------------
 !  PCBB - Privileged Context Block Base
 ! 
 !  PS - Processor Status
 ! 
 !  The PS is not an IPR in the sense that it isn't read/written using
 !  the MxPR operators. However, the bitfields of the PS are defined
 !  here since this is the repository for bitfields of architected IPRs,
 !  hence it's convenient to define them here.
 ! 
 !  Although the 'software' field of the PS is not privileged state and
 !  may be used by users as they see fit in User mode, VMS imposes a
 !  privileged interpretation on the bits when used in any of the three
 !  inner processor modes (Kernel, Executive, Supervisor). There are
 !  consequences of this:
 ! 
 ! 	1) Should User mode code be using the software field bits, it
 ! 		must be assumed that the User mode setting of these
 ! 		bits are entirely ignored by inner mode software.
 ! 
 ! 	2) VMS reserves the right to redefine its privileged (inner
 ! 		mode) interpretation of these bits at any time.
 ! 
	    MAP
	        PARAMETER PR$S_PS_SW = 2
	        PARAMETER PR$V_PS_SW = 0		 !  Software Bits
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER PR$S_PS_PRVMOD = 2
	        PARAMETER PR$V_PS_PRVMOD = 0		 !  Previous Processor Mode
	        PARAMETER PR$S_PS_SYSSTATE = 1
	        PARAMETER PR$V_PS_SYSSTATE = 2		 !  System State Indicator
	        PARAMETER PR$S_PS_CURMOD = 2
	        PARAMETER PR$V_PS_CURMOD = 3		 !  Current Processor Mode
	        PARAMETER PR$S_PS_VMM = 1
	        PARAMETER PR$V_PS_VMM = 7		 !  Virtual Machine Monitor
	        PARAMETER PR$S_PS_IPL = 5
	        PARAMETER PR$V_PS_IPL = 8		 !  Interrupt Priority Level
	        PARAMETER PR$S_PS_SP_ALIGN = 6
	        PARAMETER PR$V_PS_SP_ALIGN = 56		 !  Stack Pointer Alignment
	        PARAMETER PR$S_PS_MBZ_62 = 1
	        PARAMETER PR$V_PS_MBZ_62 = 62		 !  Reserved bit above SP alignment
	        PARAMETER PR$S_PS_MBZ_63 = 1
	        PARAMETER PR$V_PS_MBZ_63 = 63
	        BYTE %FILL (3)				 !  Reserved bit above SP alignment
	    END MAP
 ! 
 !   Maximum bit number used in the PS register
 ! 
 !  MODE SYMBOL DEFINITIONS
 ! 
 !  PTBR - Page Table Base Register
 ! 
	    MAP
	    PARAMETER PR$S_PTBR_PFN = 32
	    PARAMETER PR$V_PTBR_PFN = 0		 !  PFN of current L1PT
	    BYTE %FILL (4)
	    END MAP
 ! -------------------------------------------------------------------
 !  SCBB - System Control Block Base
 ! 
	    MAP
	    PARAMETER PR$S_SCBB_PFN = 32
	    PARAMETER PR$V_SCBB_PFN = 0		 !  PFN of SCB
	    BYTE %FILL (4)
	    END MAP
 ! -------------------------------------------------------------------
 !  SIRR - Software Interrupt Request Register
 ! 
	    MAP
	    PARAMETER PR$S_SIRR_LVL = 4
	    PARAMETER PR$V_SIRR_LVL = 0		 !  Software Interrupt Request Level
	    BYTE %FILL (1)
	    END MAP
 ! -------------------------------------------------------------------
 !  SISR - Software Interrupt Summary Register
 ! 
	    MAP
	    UNION
	        MAP
	        PARAMETER PR$S_SISR_SUMMARY = 16
	        PARAMETER PR$V_SISR_SUMMARY = 0
	        BYTE %FILL (2)				 !  Sofware Interrupt Summary
	        END MAP
	        MAP
	            PARAMETER PR$S_SISR_IR1 = 1
	            PARAMETER PR$V_SISR_IR1 = 1		 !  Softint 1 pending
	            PARAMETER PR$S_SISR_IR2 = 1
	            PARAMETER PR$V_SISR_IR2 = 2		 !  Softint 2 pending
	            PARAMETER PR$S_SISR_IR3 = 1
	            PARAMETER PR$V_SISR_IR3 = 3		 !  Softint 3 pending
	            PARAMETER PR$S_SISR_IR4 = 1
	            PARAMETER PR$V_SISR_IR4 = 4		 !  Softint 4 pending
	            PARAMETER PR$S_SISR_IR5 = 1
	            PARAMETER PR$V_SISR_IR5 = 5		 !  Softint 5 pending
	            PARAMETER PR$S_SISR_IR6 = 1
	            PARAMETER PR$V_SISR_IR6 = 6		 !  Softint 6 pending
	            PARAMETER PR$S_SISR_IR7 = 1
	            PARAMETER PR$V_SISR_IR7 = 7		 !  Softint 7 pending
	            PARAMETER PR$S_SISR_IR8 = 1
	            PARAMETER PR$V_SISR_IR8 = 8		 !  Softint 8 pending
	            PARAMETER PR$S_SISR_IR9 = 1
	            PARAMETER PR$V_SISR_IR9 = 9		 !  Softint 9 pending
	            PARAMETER PR$S_SISR_IR10 = 1
	            PARAMETER PR$V_SISR_IR10 = 10		 !  Softint 10 pending
	            PARAMETER PR$S_SISR_IR11 = 1
	            PARAMETER PR$V_SISR_IR11 = 11		 !  Softint 11 pending
	            PARAMETER PR$S_SISR_IR12 = 1
	            PARAMETER PR$V_SISR_IR12 = 12		 !  Softint 12 pending
	            PARAMETER PR$S_SISR_IR13 = 1
	            PARAMETER PR$V_SISR_IR13 = 13		 !  Softint 13 pending
	            PARAMETER PR$S_SISR_IR14 = 1
	            PARAMETER PR$V_SISR_IR14 = 14		 !  Softint 14 pending
	            PARAMETER PR$S_SISR_IR15 = 1
	            PARAMETER PR$V_SISR_IR15 = 15
	            BYTE %FILL (2)				 !  Softint 15 pending
	        END MAP
	    END UNION
	    END MAP
 ! -------------------------------------------------------------------
 !  TBCHK - Translation Buffer Check
 ! 
 !  This IPR may always be referenced with MFPR without causing an error
 !  to occur (unlike VAX), but the feature provided by TBCHK may or may
 !  not be implemented. If not, then <TBCHK_NO_TBCHK>=1 and <TBCHK_VA_PRESENT>
 !  should be ignored. If TBCHK's function IS implemented, then
 !  <TBCHK_NO_TBCHK>=0 and <TBCHK_VA_PRESENT> returns the desired data.
 ! 
	    MAP
	        PARAMETER PR$S_TBCHK_VA_PRESENT = 1
	        PARAMETER PR$V_TBCHK_VA_PRESENT = 0	 !  VA in TB = 1
	        PARAMETER PR$S_TBCHK_NO_TBCHK = 1
	        PARAMETER PR$V_TBCHK_NO_TBCHK = 63
	        BYTE %FILL (1)				 !  Not implemented = 1
	    END MAP
 ! -------------------------------------------------------------------
 !  FPCR - Floating Point Control Register
 ! 
 !  NOTE WELL: These bit symbols are to be used only when interfacing to the
 ! 	hardware FPCR internal processor register. They are NOT to be used when
 ! 	interfacing to the software floating point control register pointed to
 !  	by CTL$GQ_IEEE_FP_CONTROL/PKTA$Q_IEEE_FP_CONTROL.
 ! 
 ! 	The hardware FPCR should only be manipulated via the system service, 
 ! 	SYS$IEEE_FP_CONTROL, rather than directly.
 ! 
	    MAP
	        PARAMETER PR$S_IEEE_DNOD = 1
	        PARAMETER PR$V_IEEE_DNOD = 47		 !  Denormal operand exception disable
	        PARAMETER PR$S_IEEE_DNZ = 1
	        PARAMETER PR$V_IEEE_DNZ = 48		 !  Denormal operands to 0.0
	        PARAMETER PR$S_IEEE_INVD = 1
	        PARAMETER PR$V_IEEE_INVD = 49		 !  Invalid operation disable
	        PARAMETER PR$S_IEEE_DZED = 1
	        PARAMETER PR$V_IEEE_DZED = 50		 !  Division by zero disable
	        PARAMETER PR$S_IEEE_OVFD = 1
	        PARAMETER PR$V_IEEE_OVFD = 51		 !  Overflow disable
	        PARAMETER PR$S_IEEE_INV = 1
	        PARAMETER PR$V_IEEE_INV = 52		 !  Invalid operation.
	        PARAMETER PR$S_IEEE_DZE = 1
	        PARAMETER PR$V_IEEE_DZE = 53		 !  Division by zero occured.
	        PARAMETER PR$S_IEEE_OVF = 1
	        PARAMETER PR$V_IEEE_OVF = 54		 !  Overflow occured.
	        PARAMETER PR$S_IEEE_UNF = 1
	        PARAMETER PR$V_IEEE_UNF = 55		 !  Underflow occured.
	        PARAMETER PR$S_IEEE_INE = 1
	        PARAMETER PR$V_IEEE_INE = 56		 !  Inexact result occured.
	        PARAMETER PR$S_IEEE_IOV = 1
	        PARAMETER PR$V_IEEE_IOV = 57		 !  Integer overflow occured
	        PARAMETER PR$S_IEEE_DYN_RND = 2
	        PARAMETER PR$V_IEEE_DYN_RND = 58	 !  Dynamic Rounding mode
	        PARAMETER PR$S_IEEE_UNDZ = 1
	        PARAMETER PR$V_IEEE_UNDZ = 60		 !  Underflow to zero
	        PARAMETER PR$S_IEEE_UNFD = 1
	        PARAMETER PR$V_IEEE_UNFD = 61		 !  Underflow disable
	        PARAMETER PR$S_IEEE_INED = 1
	        PARAMETER PR$V_IEEE_INED = 62		 !  Inexact disable
	        PARAMETER PR$S_IEEE_SUMMARY = 1
	        PARAMETER PR$V_IEEE_SUMMARY = 63
	        BYTE %FILL (3)				 !  Bitwise OR of FPCR exception bits
	    END MAP
	END UNION
	END STRUCTURE	! PRDEF
!DEC$ END OPTIONS